Template:Intel processor roadmap
Template:Intel processor roadmap's theme is one that has captured the attention of many people over the years. Since his appearance on the public scene, Template:Intel processor roadmap has been the subject of debate, study and interest by experts and fans alike. Its impact on society and daily life is undeniable, and its relevance continues to be a cause for reflection in various spheres. In this article, we will explore the different facets of Template:Intel processor roadmap, from its history to its influence on the world today, with the aim of providing a complete and up-to-date overview of this fascinating topic.
Table format
This is a table with 13 columns × n rows, as derived from the graphic illustration worked up by the Commons Graphics Lab in a vertical format. The vertical format is used because the existing horizontal format is starting to require scrolling to display. This template version includes the complete P6 evolution (from its origin as the Pentium Pro microarchitecture) because of the added space afforded by the switch to vertical format.
However, updates to the existing template will require a bit more care, since tables are built row-by-row instead of column-by-column. <td rowspan=N> tags are used to expand cells beyond a single row, although that will require the editor to keep track of which cells and how many.
Columns are defined as:
- is the Atom family microarchitecture ("Atom TOCK")
- is the Atom processor codename ("Atom TICK")
- is a spacer column
- is the process/node range label (increasingly differing from actual feature size), and formatted as "<th rowspan="2">]</th>", for instance.
- is a spacer column
- is the desktop/laptop family microarchitecture ("x86 TOCK")
- is the desktop/laptop processor codename ("x86 TICK")
- is a spacer column
- is the (single-core) NetBurst processor name. It is reserved to insert the NetBurst microarchitecture only, and is used solely to add NetBurst development in parallel with P6 development. Columns 9–13 are not anticipated to require any further updating unless Intel adds another parallel/stub branch of microarchitectures. Hence many of the row definitions end with a spacer such as <td colspan="5" style="background-color:white;border:none; text-align:left;"></td>.
- is a spacer column with arrows to show the derivation of Prescott
- is the (hyperthreading) NetBurst processor name.
- is a spacer column with arrows to show the derivation of hyperthreading NetBurst processors
- is the (dual-core) NetBurst processor name. Because the dual-core NetBurst processor physically consisted of two dies on the same package, the graphical illustration displays this as a horizontal evolution.
See also
- {{Intel technology}}
- {{Intel processor roadmap}}
- {{Intel graphics}}
- {{Intel software}}
- {{Intel processors}}
- {{Intel CPU sockets}}
- {{Intel controllers}}